The present invention relates to a semiconductor device including a semiconductor memory having memory cells and redundant cells, with a function of testing the semiconductor memory.
Semiconductor memories have redundant memory cells in addition to memory cells whose memory capacity depends on addresses and the number of I/O lines. The memory cells will be replaced with the redundant memory cells to maintain high yields, if defective caused in several manufacturing processes.
Explained below is a known semiconductor device including a semiconductor memory, with a function of testing the semiconductor memory.
The known semiconductor device has a flash memory, as the semiconductor memory, with several blocks of memory cells, data being erasable per block. Replacement of a defective memory cell with a redundant memory cell is thus actually performed by replacing a block including the defective memory cell with a redundant block of redundant memory cells.
As shown in FIG. 13, a flash memory is equipped with a memory-cell array 3, a memory section 2 having a column decoder 4 and a row decoder 5, a sense amplifier 7, a controller 10 having an address controller 11 and a data controller 13, a command interface 14, an automated-operation controller 16 and a power controller 18.
The memory section 2 is controlled by the address controller 11 based on entered addresses. It is further controlled by the data controller 13 in response to a chip-enable signal CEB and a write-enable signal WEB. Data entered via I/O are sent to the memory section 2 through the data controller 13; conversely, data retrieved by the sense amplifier 2 from the memory section 2 are output to I/O through the data controller 13. Commands entered via I/O are sent to the automated-operation controller 16 and/or the power controller 18 through the command interface 14.
The power controller 18 controls power supplied to the memory section 2. The automated-operation controller 16 has a function of automatically erasing data in several blocks, for example. The automatic erasing function is to verify whether data have been erased from memory cells (erasure verification) and control the erasing operation until all cells pass erasure-verification testings.
The redundant blocks in the known semiconductor device have no particular addresses because such addresses are not necessary for replacements of defective memory cells with the redundant blocks.
Therefore, in addition to the automatic erasing function to the memory blocks, the known semiconductor device requires a further automated operation in test mode with data replacements in a replacement-address memory storing addresses to be replaced and inevitable selection of redundant blocks for redundant-block automatic writing/erasing testings.
In other words, the known semiconductor device requires more than one block-writing/erasing-verification testing to all blocks and thus requires much time for such testings.